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Power-constrained Testing of VLSI Circuits

Overview of attention for book
Cover of 'Power-constrained Testing of VLSI Circuits'

Table of Contents

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    Book Overview
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    Chapter 1 Design and Test of Digital Integrated Circuits
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    Chapter 2 Power Dissipation During Test
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    Chapter 3 Approaches to Handle Test Power
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    Chapter 4 Power Minimization Based on Best Primary Input Change Time
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    Chapter 5 Test Power Minimization Using Multiple Scan Chains
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    Chapter 6 Power-conscious Test Synthesis and Scheduling
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    Chapter 7 Power Profile Manipulation
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    Chapter 8 Conclusion
Attention for Chapter 6: Power-conscious Test Synthesis and Scheduling
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