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Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits

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Cover of 'Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits'

Table of Contents

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    Book Overview
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    Chapter 1 Introduction
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    Chapter 2 Functional and Parametric Defect Models
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    Chapter 3 Digital CMOS Fault Modeling
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    Chapter 4 Defects in Logic Circuits and their Test Implications
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    Chapter 5 Testing Defects and Parametric Variations in RAMs
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    Chapter 6 Defect-Oriented Analog Testing
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    Chapter 7 Yield Engineering
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    Chapter 8 Conclusion
Attention for Chapter 5: Testing Defects and Parametric Variations in RAMs
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