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Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits

Overview of attention for book
Attention for Chapter 4: Defects in Logic Circuits and their Test Implications
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Chapter title
Defects in Logic Circuits and their Test Implications
Chapter number 4
Book title
Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits
Published by
Springer, Boston, MA, January 2007
DOI 10.1007/0-387-46547-2_4
Book ISBNs
978-0-387-46546-3, 978-0-387-46547-0
Authors

Manoj Sachdev, José Pineda de Gyvez

Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 1 Mendeley reader of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 1 100%

Demographic breakdown

Readers by professional status Count As %
Lecturer > Senior Lecturer 1 100%
Readers by discipline Count As %
Engineering 1 100%