You are seeing a free-to-access but limited selection of the activity Altmetric has collected about this research output.
Click here to find out more.
Mendeley readers
Chapter title |
A Framework for Architecture-Level Exploration of 3-D FPGA Platforms
|
---|---|
Chapter number | 30 |
Book title |
Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation
|
Published by |
Springer, Berlin, Heidelberg, September 2011
|
DOI | 10.1007/978-3-642-24154-3_30 |
Book ISBNs |
978-3-64-224153-6, 978-3-64-224154-3
|
Authors |
Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris, Sidiropoulos, Harry, Siozios, Kostas, Soudris, Dimitrios |
Mendeley readers
The data shown below were compiled from readership statistics for 2 Mendeley readers of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
Country | Count | As % |
---|---|---|
Unknown | 2 | 100% |
Demographic breakdown
Readers by professional status | Count | As % |
---|---|---|
Professor > Associate Professor | 1 | 50% |
Researcher | 1 | 50% |
Readers by discipline | Count | As % |
---|---|---|
Computer Science | 2 | 100% |