↓ Skip to main content
What is this page? Embed badge

Designing Reliable and Efficient Networks on Chips

Overview of attention for book
Cover of 'Designing Reliable and Efficient Networks on Chips'

Table of Contents

  1. Altmetric Badge
    Book Overview
  2. Altmetric Badge
    Chapter 1 Introduction
  3. Altmetric Badge
    Chapter 2 Designing Crossbar Based Systems
  4. Altmetric Badge
    Chapter 3 Netchip Tool Flow for NoC Design
  5. Altmetric Badge
    Chapter 4 Designing Standard Topologies
  6. Altmetric Badge
    Chapter 5 Designing Custom Topologies
  7. Altmetric Badge
    Chapter 6 Supporting Multiple Applications
  8. Altmetric Badge
    Chapter 7 Supporting Dynamic Application Patterns
  9. Altmetric Badge
    Chapter 8 Timing-Error Tolerant NoC Design
  10. Altmetric Badge
    Chapter 9 Analysis of NoC Error Recovery Schemes
  11. Altmetric Badge
    Chapter 10 Fault-Tolerant Route Generation
  12. Altmetric Badge
    Chapter 11 NoC Support for Reliable On-Chip Memories
  13. Altmetric Badge
    Chapter 12 Conclusions and Future Directions
Attention for Chapter 11: NoC Support for Reliable On-Chip Memories
Altmetric Badge

Citations

dimensions_citation
19 Dimensions
Summary Dimensions citations
So far, Dimensions has found 19 publications that cite this research output.

19

The most recent citing publications are shown below. View all 19 publications that cite this research output on Dimensions.

This page shows the most recent citations of this research output.

Click here to find out how to access more activity.

This page is provided by Altmetric.