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Leakage in Nanometer CMOS Technologies

Overview of attention for book
Cover of 'Leakage in Nanometer CMOS Technologies'

Table of Contents

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    Book Overview
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    Chapter 1 Taxonomy of Leakage: Sources, Impact, and Solutions
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    Chapter 2 Leakage Dependence on Input Vector
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    Chapter 3 Power Gating and Dynamic Voltage Scaling
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    Chapter 4 Methodologies for Power Gating
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    Chapter 5 Body Biasing
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    Chapter 6 Process Variation and Adaptive Design
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    Chapter 7 Memory Leakage Reduction
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    Chapter 8 Active Leakage Reduction and Multi-Performance Devices
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    Chapter 9 Impact of Leakage Power and Variation on Testing
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    Chapter 10 Case Study: Leakage Reduction in Hitachi/Renesas Microprocessors
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    Chapter 11 Case Study: Leakage Reduction in the Intel Xscale Microprocessor
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    Chapter 12 Transistor Design to Reduce Leakage
Attention for Chapter 6: Process Variation and Adaptive Design
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Chapter title
Process Variation and Adaptive Design
Chapter number 6
Book title
Leakage in Nanometer CMOS Technologies
Published by
Springer, Boston, MA, January 2006
DOI 10.1007/0-387-28133-9_6
Book ISBNs
978-0-387-25737-2, 978-0-387-28133-9
Authors

Siva Narendra, James Tschanz, James Kao, Shekar Borkar, Anantha Chandrakasan, Vivek De

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