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| Chapter title |
Synthesis of Two-Level Circuits
|
|---|---|
| Chapter number | 4 |
| Book title |
Logic Synthesis and Verification Algorithms
|
| Published by |
Springer, Boston, MA, January 2002
|
| DOI | 10.1007/0-306-47592-8_4 |
| Book ISBNs |
978-0-7923-9746-5, 978-0-306-47592-4
|