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Chapter title |
Enhanced input timing checks
|
---|---|
Chapter number | 42 |
Book title |
Verilog — 2001
|
Published by |
Springer, Boston, MA, January 2002
|
DOI | 10.1007/978-1-4615-1713-9_42 |
Book ISBNs |
978-1-4613-5691-2, 978-1-4615-1713-9
|
Authors |
Stuart Sutherland, Sutherland, Stuart |