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Verilog — 2001

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Cover of 'Verilog — 2001'

Table of Contents

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    Book Overview
  2. Altmetric Badge
    Chapter 1 Introduction
  3. Altmetric Badge
    Chapter 2 What’s new in Verilog-2001
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    Chapter 3 Combined port and data type declarations
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    Chapter 4 ANSI C style module declarations
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    Chapter 5 Module port parameter lists
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    Chapter 6 ANSI C style UDP declarations
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    Chapter 7 Variable initial value at declaration
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    Chapter 8 ANSI C style task/function declarations
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    Chapter 9 Automatic (re-entrant) tasks
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    Chapter 10 Automatic (recursive) functions
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    Chapter 11 Constant functions
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    Chapter 12 Comma separated sensitivity lists
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    Chapter 13 Combinational logic sensitivity lists
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    Chapter 14 Implicit nets for continuous assignments
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    Chapter 15 Disabling implicit net declarations
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    Chapter 16 Variable vector part selects
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    Chapter 17 Multidimensional arrays
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    Chapter 18 Arrays of net and real data types
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    Chapter 19 Array bit and part selects
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    Chapter 20 Signed reg, net and port declarations
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    Chapter 21 Signed based integer numbers
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    Chapter 22 Signed functions
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    Chapter 23 Sign conversion system functions
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    Chapter 24 Arithmetic shift operators
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    Chapter 25 Assignment width extension past 32 bits
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    Chapter 26 Power operator
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    Chapter 27 Attributes
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    Chapter 28 Sized and typed parameter constants
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    Chapter 29 Explicit in-line parameter redefinition
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    Chapter 30 Fixed local parameters
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    Chapter 31 Standard random number generator
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    Chapter 32 Extended number of open files
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    Chapter 33 Enhanced file I/O
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    Chapter 34 String read and write system tasks
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    Chapter 35 Enhanced invocation option testing
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    Chapter 36 Enhanced conditional compilation
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    Chapter 37 Source file and line compiler directive
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    Chapter 38 Generate blocks
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    Chapter 39 Configurations
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    Chapter 40 On-detect pulse error propagation
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    Chapter 41 Negative pulse detection
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    Chapter 42 Enhanced input timing checks
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    Chapter 43 Negative input timing constraints
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    Chapter 44 Enhanced SDF file support
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    Chapter 45 Extended VCD files
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    Chapter 46 Enhanced PLA system tasks
  48. Altmetric Badge
    Chapter 47 Enhanced Verilog PLI support
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Title
Verilog — 2001
Published by
Springer Science & Business Media, December 2012
DOI 10.1007/978-1-4615-1713-9
ISBNs
978-1-4615-1713-9, 978-1-4613-5691-2
Authors

Sutherland, Stuart

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X Demographics

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Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 3 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 3 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 2 67%
Researcher 1 33%
Readers by discipline Count As %
Engineering 3 100%