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Timeline
Mendeley readers
Chapter title |
Clock Domain Crossing (CDC) Verification
|
---|---|
Chapter number | 8 |
Book title |
ASIC/SoC Functional Design Verification
|
Published by |
Springer, Cham, January 2018
|
DOI | 10.1007/978-3-319-59418-7_8 |
Book ISBNs |
978-3-31-959417-0, 978-3-31-959418-7
|
Authors |
Ashok B. Mehta |
Mendeley readers
The data shown below were compiled from readership statistics for 1 Mendeley reader of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
Country | Count | As % |
---|---|---|
Unknown | 1 | 100% |
Demographic breakdown
Readers by professional status | Count | As % |
---|---|---|
Student > Ph. D. Student | 1 | 100% |
Readers by discipline | Count | As % |
---|---|---|
Engineering | 1 | 100% |