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Design, Modeling and Testing of Data Converters

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Cover of 'Design, Modeling and Testing of Data Converters'

Table of Contents

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    Book Overview
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    Chapter 1 A Power-Optimized High-Speed and High-Resolution Pipeline ADC with a Parallel Sampling First Stage for Broadband Multi-Carrier Systems
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    Chapter 2 Design of Power, Dynamic Range, Bandwidth and Noise Scalable ADCs
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    Chapter 3 Current and Emerging Trends in the Design of Digital-to-Analog Converters
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    Chapter 4 Digitally-Based Calibration Techniques for RF $$ \Upsigma \Updelta $$ Σ Δ Modulators
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    Chapter 5 Incremental and Extended-Range Data Converters
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    Chapter 6 Event-Driven Successive Charge Redistribution Schemes for Clockless Analog-to-Digital Conversion
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    Chapter 7 Time-to-Digital Converters
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    Chapter 8 Look-Up Tables, Dithering and Volterra Series for ADC Improvements
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    Chapter 9 A/D Conversion with Non-uniform Differential Quantization
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    Chapter 10 Dynamic Testing of Analog-to-Digital Converters by Means of the Sine-Fitting Algorithms
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    Chapter 11 Histogram-Based Techniques for ADC Testing
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    Chapter 12 DAC Standardization and Advanced Testing Methods
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    Chapter 13 Uncertainty Analysis of Data Converters Testing Parameters
Attention for Chapter 6: Event-Driven Successive Charge Redistribution Schemes for Clockless Analog-to-Digital Conversion
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Chapter title
Event-Driven Successive Charge Redistribution Schemes for Clockless Analog-to-Digital Conversion
Chapter number 6
Book title
Design, Modeling and Testing of Data Converters
Published by
Springer, Berlin, Heidelberg, January 2014
DOI 10.1007/978-3-642-39655-7_6
Book ISBNs
978-3-64-239654-0, 978-3-64-239655-7
Authors

Dariusz Kościelnik, Marek Miśkowicz, Kościelnik, Dariusz, Miśkowicz, Marek

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