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Mendeley readers
Chapter title |
Transistor Level Synthesis Dedicated to Fast I.P. Prototyping
|
---|---|
Chapter number | 16 |
Book title |
Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation
|
Published by |
Springer, Berlin, Heidelberg, September 2002
|
DOI | 10.1007/3-540-45716-x_16 |
Book ISBNs |
978-3-54-044143-4, 978-3-54-045716-9
|
Authors |
A. Landrault, L. Pellier, A. Richard, C. Jay, M. Robert, D. Auvergne |
Mendeley readers
The data shown below were compiled from readership statistics for 2 Mendeley readers of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
Country | Count | As % |
---|---|---|
China | 1 | 50% |
Unknown | 1 | 50% |
Demographic breakdown
Readers by professional status | Count | As % |
---|---|---|
Researcher | 1 | 50% |
Unknown | 1 | 50% |
Readers by discipline | Count | As % |
---|---|---|
Engineering | 1 | 50% |
Unknown | 1 | 50% |