Designing 2D and 3D Network-on-Chip Architectures

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Cover of 'Designing 2D and 3D Network-on-Chip Architectures'

Table of Contents

Attention for Chapter 7: The Spidergon STNoC

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dimensions_citation: 56 Dimensions

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So far, Dimensions has found 56 publications that cite this research output.

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The most recent citing publications are shown below. View all 56 publications that cite this research output on Dimensions.

Design and Modeling of a Terahertz Transceiver for Intra- and Inter-Chip Communications in Wireless Network-on-Chip Architectures

Article in Sensors (May 2024)

A Survey of MPSoC Management toward Self-Awareness

Article in Micromachines (April 2024)

A survey on mapping and scheduling techniques for 3D Network-on-chip

Article in Journal of Systems Architecture (February 2024)

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