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Computer Aided Verification

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Cover of 'Computer Aided Verification'

Table of Contents

  1. Altmetric Badge
    Book Overview
  2. Altmetric Badge
    Chapter 1 Automatically Proving Program Termination
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    Chapter 2 A Mathematical Approach to RTL Verification
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    Chapter 3 Software Bugs Seen from an Industrial Perspective or Can Formal Methods Help on Automotive Software Development?
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    Chapter 4 Algorithms for Interface Synthesis
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    Chapter 5 A Tutorial on Satisfiability Modulo Theories
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    Chapter 6 A JML Tutorial: Modular Specification and Verification of Functional Behavior for Java
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    Chapter 7 Verification of Hybrid Systems
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    Chapter 8 SAT-Based Compositional Verification Using Lazy Learning
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    Chapter 9 Local Proofs for Global Safety Properties
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    Chapter 10 Low-Level Library Analysis and Summarization
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    Chapter 11 Verification Across Intellectual Property Boundaries
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    Chapter 12 On Synthesizing Controllers from Bounded-Response Properties
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    Chapter 13 An Accelerated Algorithm for 3-Color Parity Games with an Application to Timed Games
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    Chapter 14 UPPAAL-Tiga: Time for Playing Games!
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    Chapter 15 The TASM Toolset: Specification, Simulation, and Formal Verification of Real-Time Systems
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    Chapter 16 Systematic Acceleration in Regular Model Checking
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    Chapter 17 Parameterized Verification of Infinite-State Processes with Global Conditions
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    Chapter 18 CADP 2006: A Toolbox for the Construction and Analysis of Distributed Processes
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    Chapter 19 jMoped: A Test Environment for Java Programs
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    Chapter 20 Hector : Software Model Checking with Cooperating Analysis Plugins
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    Chapter 21 The Why/Krakatoa/Caduceus Platform for Deductive Program Verification
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    Chapter 22 Shape Analysis for Composite Data Structures
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    Chapter 23 Array Abstractions from Proofs
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    Chapter 24 Context-Bounded Analysis of Multithreaded Programs with Dynamic Linked Structures
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    Chapter 25 Revamping TVLA: Making Parametric Shape Analysis Competitive
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    Chapter 26 Fast and Accurate Static Data-Race Detection for Concurrent Programs
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    Chapter 27 Parametric and Sliced Causality
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    Chapter 28 Spade : Verification of Multithreaded Dynamic and Recursive Programs
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    Chapter 29 Anzu: A Tool for Property Synthesis
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    Chapter 30 RAT: A Tool for the Formal Analysis of Requirements
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    Chapter 31 Parallelising Symbolic State-Space Generators
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    Chapter 32 I/O Efficient Accepting Cycle Detection
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    Chapter 33 C32SAT: Checking C Expressions
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    Chapter 34 CVC3
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    Chapter 35 BAT: The Bit-Level Analysis Tool
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    Chapter 36 LIRA: Handling Constraints of Linear Arithmetics over the Integers and the Reals
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    Chapter 37 Three-Valued Abstraction for Continuous-Time Markov Chains
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    Chapter 38 Magnifying-Lens Abstraction for Markov Decision Processes
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    Chapter 39 Underapproximation for Model-Checking Based on Random Cryptographic Constructions
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    Chapter 40 Using Counterexamples for Improving the Precision of Reachability Computation with Polyhedra
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    Chapter 41 Structural Abstraction of Software Verification Conditions
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    Chapter 42 An Abstract Domain for Analyzing Heap-Manipulating Low-Level Software
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    Chapter 43 Adaptive Symmetry Reduction
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    Chapter 44 From Liveness to Promptness
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    Chapter 45 Automated Assumption Generation for Compositional Verification
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    Chapter 46 Abstraction and Counterexample-Guided Construction of ω -Automata for Model Checking of Step-Discrete Linear Hybrid Models
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    Chapter 47 Test Coverage for Continuous and Hybrid Systems
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    Chapter 48 Hybrid Systems: From Verification to Falsification
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    Chapter 49 Comparison Under Abstraction for Verifying Linearizability
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    Chapter 50 Leaping Loops in the Presence of Abstraction
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    Chapter 51 Configurable Software Verification: Concretizing the Convergence of Model Checking and Program Analysis
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    Chapter 52 A Decision Procedure for Bit-Vectors and Arrays
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    Chapter 53 Boolean Abstraction for Temporal Logic Satisfiability
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    Chapter 54 A Lazy and Layered SMT( $\mathcal{BV}$ ) Solver for Hard Industrial Verification Problems
Attention for Chapter 12: On Synthesizing Controllers from Bounded-Response Properties
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Chapter title
On Synthesizing Controllers from Bounded-Response Properties
Chapter number 12
Book title
Computer Aided Verification
Published by
Springer, Berlin, Heidelberg, July 2007
DOI 10.1007/978-3-540-73368-3_12
Book ISBNs
978-3-54-073367-6, 978-3-54-073368-3
Authors

Oded Maler, Dejan Nickovic, Amir Pnueli, Maler, Oded, Nickovic, Dejan, Pnueli, Amir

Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 21 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 21 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 9 43%
Researcher 3 14%
Professor > Associate Professor 2 10%
Student > Doctoral Student 1 5%
Student > Master 1 5%
Other 3 14%
Unknown 2 10%
Readers by discipline Count As %
Computer Science 15 71%
Engineering 4 19%
Unknown 2 10%