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Power-Aware Computer Systems

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Cover of 'Power-Aware Computer Systems'

Table of Contents

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    Book Overview
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    Chapter 1 Early-Stage Definition of LPX: A Low Power Issue-Execute Processor
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    Chapter 2 Dynamic Tag-Check Omission: A Low Power Instruction Cache Architecture Exploiting Execution Footprints
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    Chapter 3 A Hardware Architecture for Dynamic Performance and Energy Adaptation
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    Chapter 4 Multi-Processor Computer System Having Low Power Consumption
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    Chapter 5 An Integrated Heuristic Approach to Power-Aware Real-Time Scheduling
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    Chapter 6 Power-Aware Task Motion for Enhancing Dynamic Range of Embedded Systems with Renewable Energy Sources
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    Chapter 7 A Low-Power Content-Adaptive Texture Mapping Architecture for Real-Time 3D Graphics
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    Chapter 8 Energy-Driven Statistical Sampling: Detecting Software Hotspots
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    Chapter 9 Modeling of DRAM Power Control Policies Using Deterministic and Stochastic Petri Nets
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    Chapter 10 SimDVS: An Integrated Simulation Environment for Performance Evaluation of Dynamic Voltage Scaling Algorithms
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    Chapter 11 Application-Supported Device Management for Energy and Performance
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    Chapter 12 Energy-Efficient Server Clusters
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    Chapter 13 Single Region vs. Multiple Regions: A Comparison of Different Compiler-Directed Dynamic Voltage Scheduling Approaches
Attention for Chapter 13: Single Region vs. Multiple Regions: A Comparison of Different Compiler-Directed Dynamic Voltage Scheduling Approaches
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