↓ Skip to main content

Applied Reconfigurable Computing. Architectures, Tools, and Applications

Overview of attention for book
Cover of 'Applied Reconfigurable Computing. Architectures, Tools, and Applications'

Table of Contents

  1. Altmetric Badge
    Book Overview
  2. Altmetric Badge
    Chapter 1 Improving Performance Estimation for FPGA-Based Accelerators for Convolutional Neural Networks
  3. Altmetric Badge
    Chapter 2 Judiciously Spreading Approximation Among Arithmetic Components with Top-Down Inexact Hardware Design
  4. Altmetric Badge
    Chapter 3 Optimising Operator Sets for Analytical Database Processing on FPGAs
  5. Altmetric Badge
    Chapter 4 Automated Toolchain for Enhanced Productivity in Reconfigurable Multi-accelerator Systems
  6. Altmetric Badge
    Chapter 5 Chisel Usecase: Designing General Matrix Multiply for FPGA
  7. Altmetric Badge
    Chapter 6 Cycle-Accurate Debugging of Embedded Designs Using Recurrent Neural Networks
  8. Altmetric Badge
    Chapter 7 Soft-Error Analysis of Self-reconfiguration Controllers for Safety Critical Dynamically Reconfigurable FPGAs
  9. Altmetric Badge
    Chapter 8 SysIDLib: A High-Level Synthesis FPGA Library for Online System Identification
  10. Altmetric Badge
    Chapter 9 Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices
  11. Altmetric Badge
    Chapter 10 Accuracy, Training Time and Hardware Efficiency Trade-Offs for Quantized Neural Networks on FPGAs
  12. Altmetric Badge
    Chapter 11 Accelerating a Classic 3D Video Game on Heterogeneous Reconfigurable MPSoCs
  13. Altmetric Badge
    Chapter 12 Cross-layer CNN Approximations for Hardware Implementation
  14. Altmetric Badge
    Chapter 13 Technique for Vendor and Device Agnostic Hardware Area-Time Estimation
  15. Altmetric Badge
    Chapter 14 Resource Efficient Dynamic Voltage and Frequency Scaling on Xilinx FPGAs
  16. Altmetric Badge
    Chapter 15 RISC-V Based MPSoC Design Exploration for FPGAs: Area, Power and Performance
  17. Altmetric Badge
    Chapter 16 A Modular Software Library for Effective High Level Synthesis of Convolutional Neural Networks
  18. Altmetric Badge
    Chapter 17 HLS-Based Acceleration Framework for Deep Convolutional Neural Networks
  19. Altmetric Badge
    Chapter 18 FPGA-Based Computational Fluid Dynamics Simulation Architecture via High-Level Synthesis Design Method
  20. Altmetric Badge
    Chapter 19 High-Level Synthesis in Implementing and Benchmarking Number Theoretic Transform in Lattice-Based Post-Quantum Cryptography Using Software/Hardware Codesign
  21. Altmetric Badge
    Chapter 20 Exploring fpga Optimizations to Compute Sparse Numerical Linear Algebra Kernels
  22. Altmetric Badge
    Chapter 21 A CGRA Definition Framework for Dataflow Applications
  23. Altmetric Badge
    Chapter 22 Implementing CNNs Using a Linear Array of Full Mesh CGRAs
  24. Altmetric Badge
    Chapter 23 A Block-Based Systolic Array on an HBM2 FPGA for DNA Sequence Alignment
  25. Altmetric Badge
    Chapter 24 Comparison of Direct and Indirect Networks for High-Performance FPGA Clusters
  26. Altmetric Badge
    Chapter 25 A Parameterisable FPGA-Tailored Architecture for YOLOv3-Tiny
  27. Altmetric Badge
    Chapter 26 Hardware/Algorithm Co-optimization for Fully-Parallelized Compact Decision Tree Ensembles on FPGAs
  28. Altmetric Badge
    Chapter 27 StocNoC: Accelerating Stochastic Models Through Reconfigurable Network on Chip Architectures
  29. Altmetric Badge
    Chapter 28 Implementation of FM-Index Based Pattern Search on a Multi-FPGA System
  30. Altmetric Badge
    Chapter 29 Reconfigurable Accelerator for On-Board SAR Imaging Using the Backprojection Algorithm
Attention for Chapter 1: Improving Performance Estimation for FPGA-Based Accelerators for Convolutional Neural Networks
Altmetric Badge

Mentioned by

twitter
1 X user

Readers on

mendeley
12 Mendeley
You are seeing a free-to-access but limited selection of the activity Altmetric has collected about this research output. Click here to find out more.
Chapter title
Improving Performance Estimation for FPGA-Based Accelerators for Convolutional Neural Networks
Chapter number 1
Book title
Applied Reconfigurable Computing. Architectures, Tools, and Applications
Published by
Springer, Cham, April 2020
DOI 10.1007/978-3-030-44534-8_1
Book ISBNs
978-3-03-044533-1, 978-3-03-044534-8
Authors

Martin Ferianc, Hongxiang Fan, Ringo S. W. Chu, Jakub Stano, Wayne Luk, Ferianc, Martin, Fan, Hongxiang, Chu, Ringo S. W., Stano, Jakub, Luk, Wayne

X Demographics

X Demographics

The data shown below were collected from the profile of 1 X user who shared this research output. Click here to find out more about how the information was compiled.
Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 12 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 12 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 4 33%
Professor 1 8%
Student > Master 1 8%
Unknown 6 50%
Readers by discipline Count As %
Engineering 3 25%
Computer Science 2 17%
Unknown 7 58%