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Applied Reconfigurable Computing. Architectures, Tools, and Applications

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Cover of 'Applied Reconfigurable Computing. Architectures, Tools, and Applications'

Table of Contents

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    Book Overview
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    Chapter 1 Improving Performance Estimation for FPGA-Based Accelerators for Convolutional Neural Networks
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    Chapter 2 Judiciously Spreading Approximation Among Arithmetic Components with Top-Down Inexact Hardware Design
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    Chapter 3 Optimising Operator Sets for Analytical Database Processing on FPGAs
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    Chapter 4 Automated Toolchain for Enhanced Productivity in Reconfigurable Multi-accelerator Systems
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    Chapter 5 Chisel Usecase: Designing General Matrix Multiply for FPGA
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    Chapter 6 Cycle-Accurate Debugging of Embedded Designs Using Recurrent Neural Networks
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    Chapter 7 Soft-Error Analysis of Self-reconfiguration Controllers for Safety Critical Dynamically Reconfigurable FPGAs
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    Chapter 8 SysIDLib: A High-Level Synthesis FPGA Library for Online System Identification
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    Chapter 9 Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices
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    Chapter 10 Accuracy, Training Time and Hardware Efficiency Trade-Offs for Quantized Neural Networks on FPGAs
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    Chapter 11 Accelerating a Classic 3D Video Game on Heterogeneous Reconfigurable MPSoCs
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    Chapter 12 Cross-layer CNN Approximations for Hardware Implementation
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    Chapter 13 Technique for Vendor and Device Agnostic Hardware Area-Time Estimation
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    Chapter 14 Resource Efficient Dynamic Voltage and Frequency Scaling on Xilinx FPGAs
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    Chapter 15 RISC-V Based MPSoC Design Exploration for FPGAs: Area, Power and Performance
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    Chapter 16 A Modular Software Library for Effective High Level Synthesis of Convolutional Neural Networks
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    Chapter 17 HLS-Based Acceleration Framework for Deep Convolutional Neural Networks
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    Chapter 18 FPGA-Based Computational Fluid Dynamics Simulation Architecture via High-Level Synthesis Design Method
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    Chapter 19 High-Level Synthesis in Implementing and Benchmarking Number Theoretic Transform in Lattice-Based Post-Quantum Cryptography Using Software/Hardware Codesign
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    Chapter 20 Exploring fpga Optimizations to Compute Sparse Numerical Linear Algebra Kernels
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    Chapter 21 A CGRA Definition Framework for Dataflow Applications
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    Chapter 22 Implementing CNNs Using a Linear Array of Full Mesh CGRAs
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    Chapter 23 A Block-Based Systolic Array on an HBM2 FPGA for DNA Sequence Alignment
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    Chapter 24 Comparison of Direct and Indirect Networks for High-Performance FPGA Clusters
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    Chapter 25 A Parameterisable FPGA-Tailored Architecture for YOLOv3-Tiny
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    Chapter 26 Hardware/Algorithm Co-optimization for Fully-Parallelized Compact Decision Tree Ensembles on FPGAs
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    Chapter 27 StocNoC: Accelerating Stochastic Models Through Reconfigurable Network on Chip Architectures
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    Chapter 28 Implementation of FM-Index Based Pattern Search on a Multi-FPGA System
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    Chapter 29 Reconfigurable Accelerator for On-Board SAR Imaging Using the Backprojection Algorithm
Attention for Chapter 1: Improving Performance Estimation for FPGA-Based Accelerators for Convolutional Neural Networks
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Chapter title
Improving Performance Estimation for FPGA-Based Accelerators for Convolutional Neural Networks
Chapter number 1
Book title
Applied Reconfigurable Computing. Architectures, Tools, and Applications
Published by
Springer, Cham, April 2020
DOI 10.1007/978-3-030-44534-8_1
Book ISBNs
978-3-03-044533-1, 978-3-03-044534-8

Martin Ferianc, Hongxiang Fan, Ringo S. W. Chu, Jakub Stano, Wayne Luk, Ferianc, Martin, Fan, Hongxiang, Chu, Ringo S. W., Stano, Jakub, Luk, Wayne

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The data shown below were collected from the profile of 1 X user who shared this research output. Click here to find out more about how the information was compiled.
Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 12 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 12 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 4 33%
Professor 1 8%
Student > Master 1 8%
Unknown 6 50%
Readers by discipline Count As %
Engineering 3 25%
Computer Science 2 17%
Unknown 7 58%