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High Performance Embedded Architectures and Compilers

Overview of attention for book
Cover of 'High Performance Embedded Architectures and Compilers'

Table of Contents

  1. Altmetric Badge
    Book Overview
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    Chapter 1 Keynote: Challenges on the Road to Exascale Computing
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    Chapter 2 Keynote: Compilers in the Manycore Era
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    Chapter 3 High Performance Embedded Architectures and Compilers
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    Chapter 4 Predictive Runtime Code Scheduling for Heterogeneous Architectures
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    Chapter 5 Collective Optimization
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    Chapter 6 High Speed CPU Simulation Using LTU Dynamic Binary Translation
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    Chapter 7 Integrated Modulo Scheduling for Clustered VLIW Architectures
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    Chapter 8 Software Pipelining in Nested Loops with Prolog-Epilog Merging
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    Chapter 9 A Flexible Code Compression Scheme Using Partitioned Look-Up Tables
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    Chapter 10 MLP-Aware Runahead Threads in a Simultaneous Multithreading Processor
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    Chapter 11 IPC Control for Multiple Real-Time Threads on an In-Order SMT Processor
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    Chapter 12 A Hardware Task Scheduler for Embedded Video Processing
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    Chapter 13 Finding Stress Patterns in Microprocessor Workloads
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    Chapter 14 Deriving Efficient Data Movement from Decoupled Access/Execute Specifications
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    Chapter 15 MPSoC Design Using Application-Specific Architecturally Visible Communication
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    Chapter 16 Communication Based Proactive Link Power Management
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    Chapter 17 Mapping and Synchronizing Streaming Applications on Cell Processors
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    Chapter 18 Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors
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    Chapter 19 Accomodating Diversity in CMPs with Heterogeneous Frequencies
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    Chapter 20 A Framework for Task Scheduling and Memory Partitioning for Multi-Processor System-on-Chip
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    Chapter 21 Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture
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    Chapter 22 Predictive Thermal Management for Chip Multiprocessors Using Co-designed Virtual Machines
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    Chapter 23 HeDGE: Hybrid Dataflow Graph Execution in the Issue Logic
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    Chapter 24 Compiler Controlled Speculation for Power Aware ILP Extraction in Dataflow Architectures
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    Chapter 25 Revisiting Cache Block Superloading
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    Chapter 26 ACM: An Efficient Approach for Managing Shared Caches in Chip Multiprocessors
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    Chapter 27 In-Network Caching for Chip Multiprocessors
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    Chapter 28 Parallel LDPC Decoding on the Cell/B.E. Processor
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    Chapter 29 Parallel H.264 Decoding on an Embedded Multicore Processor
Overall attention for this book and its chapters
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About this Attention Score

  • In the top 25% of all research outputs scored by Altmetric
  • High Attention Score compared to outputs of the same age (88th percentile)
  • High Attention Score compared to outputs of the same age and source (87th percentile)

Mentioned by

patent
5 patents
wikipedia
3 Wikipedia pages

Readers on

mendeley
37 Mendeley
You are seeing a free-to-access but limited selection of the activity Altmetric has collected about this research output. Click here to find out more.
Title
High Performance Embedded Architectures and Compilers
Published by
Lecture notes in computer science, January 2009
DOI 10.1007/978-3-540-92990-1
ISBNs
978-3-54-092989-5, 978-3-54-092990-1
Authors

André Seznec, Joel Emer, Michael O’Boyle, Margaret Martonosi, Theo Ungerer

Editors

André Seznec, Joel Emer, Michael O’Boyle, Margaret Martonosi, Theo Ungerer

Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 37 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Portugal 1 3%
Switzerland 1 3%
Finland 1 3%
Taiwan 1 3%
Belgium 1 3%
United States 1 3%
Unknown 31 84%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 11 30%
Student > Master 9 24%
Student > Bachelor 4 11%
Researcher 4 11%
Student > Doctoral Student 2 5%
Other 6 16%
Unknown 1 3%
Readers by discipline Count As %
Computer Science 26 70%
Engineering 7 19%
Environmental Science 1 3%
Physics and Astronomy 1 3%
Psychology 1 3%
Other 0 0%
Unknown 1 3%
Attention Score in Context

Attention Score in Context

This research output has an Altmetric Attention Score of 9. This is our high-level measure of the quality and quantity of online attention that it has received. This Attention Score, as well as the ranking and number of research outputs shown below, was calculated when the research output was last mentioned on 02 July 2023.
All research outputs
#3,284,153
of 22,856,968 outputs
Outputs from Lecture notes in computer science
#753
of 8,127 outputs
Outputs of similar age
#16,489
of 169,387 outputs
Outputs of similar age from Lecture notes in computer science
#15
of 177 outputs
Altmetric has tracked 22,856,968 research outputs across all sources so far. Compared to these this one has done well and is in the 84th percentile: it's in the top 25% of all research outputs ever tracked by Altmetric.
So far Altmetric has tracked 8,127 research outputs from this source. They receive a mean Attention Score of 5.0. This one has done particularly well, scoring higher than 90% of its peers.
Older research outputs will score higher simply because they've had more time to accumulate mentions. To account for age we can compare this Altmetric Attention Score to the 169,387 tracked outputs that were published within six weeks on either side of this one in any source. This one has done well, scoring higher than 88% of its contemporaries.
We're also able to compare this research output to 177 others from the same source and published within six weeks on either side of this one. This one has done well, scoring higher than 87% of its contemporaries.