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Phase-Locked Loop (PLL)-Based Frequency Synthesizer for Digital Systems Driving
Proceedings of the 4th Brazilian Technology Symposium (BTSym'18)
Springer, Cham, May 2019
R. N. S. Raphael, Agord M. Pinto Jr., Leandro T. Manera, Saulo Finco
The data shown below were compiled from readership statistics for 2 Mendeley readers of this research output. Click here to see the associated Mendeley record.
|Readers by professional status||Count||As %|
|Student > Master||2||100%|
|Readers by discipline||Count||As %|