SLMLET: A RISC-V Processor SoC with Tightly-Coupled Area-Efficient eFPGA Blocks
Conference proceeding (April 2024)
The most recent citing publications are shown below. View all 17 publications that cite this research output on Dimensions.
A Layout Area Reduction of Basic Logic Element by Using a Neuron CMOS Type 4-input Variable Logic Circuit
Conference proceeding (November 2023)
Implementation and Analysis on 4x4 Multiplier using Genesys FPGA Board
Conference proceeding (June 2023)