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Computer-Aided Design and VLSI Device Development

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Cover of 'Computer-Aided Design and VLSI Device Development'

Table of Contents

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    Book Overview
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    Chapter 1 Overview
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    Chapter 2 Numerical Simulation Systems
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    Chapter 3 Process Simulation
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    Chapter 4 Device Simulation
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    Chapter 5 Parasitic Elements Simulation
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    Chapter 6 Methodology in Computer-Aided Design for Process and Device Development
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    Chapter 7 SUPREM III Application
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    Chapter 8 Simulation Techniques for Advanced Device Development
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    Chapter 9 Drain-Induced Barrier Lowering in Short Channel Transistors
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    Chapter 10 A Study of LDD Device Structure Using 2-D Simulations
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    Chapter 11 The Surface Inversion Problem in Trench Isolated CMOS
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    Chapter 12 Development of Isolation Structures for Applications in VLSI
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    Chapter 13 Transistor Design for Submicron CMOS Technology
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    Chapter 14 A Systematic Study of Transistor Design Traae-offs
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    Chapter 15 MOSFET Scaling by CADDET
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    Chapter 16 Examples of Parasitic Elements Simulation
Attention for Chapter 7: SUPREM III Application
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