↓ Skip to main content
What is this page? Embed badge

Computer-Aided Design and VLSI Device Development

Overview of attention for book
Cover of 'Computer-Aided Design and VLSI Device Development'

Table of Contents

  1. Altmetric Badge
    Book Overview
  2. Altmetric Badge
    Chapter 1 Overview
  3. Altmetric Badge
    Chapter 2 Numerical Simulation Systems
  4. Altmetric Badge
    Chapter 3 Process Simulation
  5. Altmetric Badge
    Chapter 4 Device Simulation
  6. Altmetric Badge
    Chapter 5 Parasitic Elements Simulation
  7. Altmetric Badge
    Chapter 6 Methodology in Computer-Aided Design for Process and Device Development
  8. Altmetric Badge
    Chapter 7 SUPREM III Application
  9. Altmetric Badge
    Chapter 8 Simulation Techniques for Advanced Device Development
  10. Altmetric Badge
    Chapter 9 Drain-Induced Barrier Lowering in Short Channel Transistors
  11. Altmetric Badge
    Chapter 10 A Study of LDD Device Structure Using 2-D Simulations
  12. Altmetric Badge
    Chapter 11 The Surface Inversion Problem in Trench Isolated CMOS
  13. Altmetric Badge
    Chapter 12 Development of Isolation Structures for Applications in VLSI
  14. Altmetric Badge
    Chapter 13 Transistor Design for Submicron CMOS Technology
  15. Altmetric Badge
    Chapter 14 A Systematic Study of Transistor Design Traae-offs
  16. Altmetric Badge
    Chapter 15 MOSFET Scaling by CADDET
  17. Altmetric Badge
    Chapter 16 Examples of Parasitic Elements Simulation
Attention for Chapter 15: MOSFET Scaling by CADDET
Altmetric Badge

Citations

dimensions_citation
14 Dimensions
Summary Dimensions citations
So far, Dimensions has found 14 publications that cite this research output.

14

The most recent citing publications are shown below. View all 14 publications that cite this research output on Dimensions.

This page shows the most recent citations of this research output.

Click here to find out how to access more activity.

This page is provided by Altmetric.