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Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications

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Cover of 'Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications'

Table of Contents

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    Book Overview
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    Chapter 1 Introduction
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    Chapter 2 Related Work
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    Chapter 3 Background
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    Chapter 4 Low-Power Problem Formalization
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    Chapter 5 Heuristics for Power Savings
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    Chapter 6 Complexity Analysis of Scheduling in CAOS-Based Synthesis
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    Chapter 7 Dynamic Power Optimizations
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    Chapter 8 Peak Power Optimizations
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    Chapter 9 Verifying Peak Power Optimizations Using SPIN Model Checker
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    Chapter 10 Epilogue
Attention for Chapter 2: Related Work
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