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VLSI-Design of Non-Volatile Memories

Overview of attention for book
Cover of 'VLSI-Design of Non-Volatile Memories'

Table of Contents

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    Book Overview
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    Chapter 1 Non-Volatile Memory Design
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    Chapter 2 Process Aspects
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    Chapter 3 The MOSFET Transistor and the Memory Cell
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    Chapter 4 Passive Components
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    Chapter 5 Fundamental Circuit Blocks
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    Chapter 6 Layout
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    Chapter 7 The Organization of the Memory Array
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    Chapter 8 The Input Buffer
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    Chapter 9 Decoders
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    Chapter 10 Boost
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    Chapter 11 Synchronization Circuits
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    Chapter 12 Reading Circuits
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    Chapter 13 Multilevel Read
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    Chapter 14 Program and Erase Algorithms
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    Chapter 15 Circuits Used in Program and Erase Operations
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    Chapter 16 High-Voltage Management System
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    Chapter 17 Program and Erase Controller
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    Chapter 18 Redundancy and Error Correction Codes
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    Chapter 19 The Output Buffer
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    Chapter 20 Test Modes
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    Chapter 21 ESD & Latch-Up
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    Chapter 22 From Specification Analysis to Floorplan Definition
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    Chapter 23 Photo Album
Attention for Chapter 21: ESD & Latch-Up
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