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Concurrent Computations

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Cover of 'Concurrent Computations'

Table of Contents

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    Book Overview
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    Chapter 1 An Ideology For Nanoelectronics
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    Chapter 2 Optical Digital Computers: Devices and Architecture
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    Chapter 3 VLSI Implementations of Neural Network Models
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    Chapter 4 Piggyback WSI GaAs Systolic Engine
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    Chapter 5 Future Physical Environments and Concurrent Computation
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    Chapter 6 Understanding Clock Skew in Synchronous Systems
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    Chapter 7 On Validating Parallel Architectures via Graph Embeddings
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    Chapter 8 Fast Parallel Algorithms for Reducible Flow Graphs
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    Chapter 9 Optimal Tree Contraction in the EREW Model
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    Chapter 10 The Dynamic Tree Expression Problem
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    Chapter 11 Randomized Parallel Computation
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    Chapter 12 A Modest Proposal for Communication Costs in Multicomputers
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    Chapter 13 Processes, Objects and Finite Events: On a formal model of concurrent (hardware) systems
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    Chapter 14 Timeless Truths about Sequential Circuits
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    Chapter 15 The SDEF Systolic Programming System
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    Chapter 16 Cyclo-Static Realizations, Loop Unrolling and CPM: Optimal Multiprocessor Scheduling
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    Chapter 17 Network Traffic Scheduling Algorithm for Application-Specific Architectures
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    Chapter 18 Implementations of Load Balanced Active-Data Models of Parallel Computation
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    Chapter 19 A Fine-Grain, Message-Passing Processing Node
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    Chapter 20 Unifying Programming Support for Parallel Computers
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    Chapter 21 System-Level Diagnosis: A Perspective for the Third Decade
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    Chapter 22 Self-Diagnosable and Self-Reconfigurable VLSI Array Structures
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    Chapter 23 Hierarchical Modeling for Reliability and Performance Measures
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    Chapter 24 Applicative Architectures for Fault-Tolerant Multiprocessors
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    Chapter 25 Fault-Tolerant Multistage Interconnection Networks for Multiprocessor Systems
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    Chapter 26 Analyzing the Connectivity and Bandwidth of Multiprocessors with Multi-stage Interconnection Networks
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    Chapter 27 Partially Augmented Data Manipulator Networks: Minimal Designs and Fault Tolerance
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    Chapter 28 The Design of Inherently Fault-Tolerant Systems
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    Chapter 29 Fault-Tolerant LU-Decomposition in a Two-Dimensional Systolic Array
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    Chapter 30 Programming Environments for Highly Parallel Scientific Computers
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    Chapter 31 Systolic Designs for State Space Models: Kalman Filtering and Neural Networks
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    Chapter 32 The Gated Interconnection Network for Dynamic Programming
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    Chapter 33 Decoding of Rate k/n Convolutional Codes in VLSI
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    Chapter 34 IC* Supercomputing Environment
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    Chapter 35 The Distributed Macro Controller for GSIMD Machines
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    Chapter 36 The Linda Machine
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Title
Concurrent Computations
Published by
Springer US, December 2012
DOI 10.1007/978-1-4684-5511-3
ISBNs
978-1-4684-5513-7, 978-1-4684-5511-3
Editors

Tewksbury, Stuart K., Dickinson, Bradley W., Schwartz, Stuart C.

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Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 5 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 5 100%

Demographic breakdown

Readers by professional status Count As %
Lecturer 1 20%
Student > Bachelor 1 20%
Student > Ph. D. Student 1 20%
Student > Master 1 20%
Professor > Associate Professor 1 20%
Other 0 0%
Readers by discipline Count As %
Mathematics 2 40%
Computer Science 1 20%
Materials Science 1 20%
Engineering 1 20%