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VLSI Specification, Verification and Synthesis

Overview of attention for book
Cover of 'VLSI Specification, Verification and Synthesis'

Table of Contents

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    Book Overview
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    Chapter 1 Implementing Safety-Critical Systems: The VIPER Microprocessor
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    Chapter 2 A Proof of Correctness of the Viper Microprocessor: The First Level
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    Chapter 3 HOL: A Proof Generating System for Higher-Order Logic
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    Chapter 4 Formal Verification and Implementation of a Microprocessor
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    Chapter 5 Towards a framework for dealing with system timing in Very High Level Silicon Compilers
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    Chapter 6 BIDS: A Method for Specifying and Verifying Bidirectional Hardware Devices
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    Chapter 7 Hardware Verification in the Interactive VHDL Workstation
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    Chapter 8 Contextual Constraints for Design and Verification
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    Chapter 9 Abstraction Mechanisms for Hardware Verification
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    Chapter 10 Formal Validation of an Integrated Circuit Design Style
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    Chapter 11 A Compositional Model of MOS Circuits
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    Chapter 12 A Tactical Framework for Hardware Design
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    Chapter 13 Verification of Asynchronous Circuits: Behaviors, Constraints and Specifications
Attention for Chapter 8: Contextual Constraints for Design and Verification
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