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Embedded Systems Development

Overview of attention for book
Cover of 'Embedded Systems Development'

Table of Contents

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    Book Overview
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    Chapter 1 Introduction: Modeling, Analysis and Synthesis of Embedded Software and Systems
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    Chapter 2 Modeling, Analysis, and Implementation of Streaming Applications for Hardware Targets
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    Chapter 3 Dataflow-Based, Cross-Platform Design Flow for DSP Applications
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    Chapter 4 Model-Driven Design of Software Defined Radio Applications Based on UML
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    Chapter 5 On Integrating EAST-ADL and UPPAAL for Embedded System Architecture Verification
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    Chapter 6 Schedulability Analysis at Early Design Stages with MARTE
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    Chapter 7 Early Time-Budgeting for Component-Based Embedded Control Systems
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    Chapter 8 Contract-Based Reasoning for Component Systems with Rich Interactions
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    Chapter 9 Extracting End-to-End Timing Models from Component-Based Distributed Embedded Systems
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    Chapter 10 Distributed Priority Assignment in Real-Time Systems
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    Chapter 11 Exploration of Distributed Automotive Systems Using Compositional Timing Analysis
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    Chapter 12 Design and Evaluation of Future Ethernet AVB-Based ECU Networks
Attention for Chapter 3: Dataflow-Based, Cross-Platform Design Flow for DSP Applications
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Citations

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Chapter title
Dataflow-Based, Cross-Platform Design Flow for DSP Applications
Chapter number 3
Book title
Embedded Systems Development
Published by
Springer, New York, NY, January 2014
DOI 10.1007/978-1-4614-3879-3_3
Book ISBNs
978-1-4614-3878-6, 978-1-4614-3879-3
Authors

Zheng Zhou, Chung-Ching Shen, William Plishker, Shuvra S. Bhattacharyya

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Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 2 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 2 100%

Demographic breakdown

Readers by professional status Count As %
Professor > Associate Professor 1 50%
Researcher 1 50%
Readers by discipline Count As %
Computer Science 1 50%
Engineering 1 50%

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