You are seeing a free-to-access but limited selection of the activity Altmetric has collected about this research output.
Click here to find out more.
Mendeley readers
| Chapter title |
VHDL (Part 1)
|
|---|---|
| Chapter number | 5 |
| Book title |
Introduction to Logic Circuits & Logic Design with VHDL
|
| Published by |
Springer, Cham, January 2017
|
| DOI | 10.1007/978-3-319-34195-8_5 |
| Book ISBNs |
978-3-31-934194-1, 978-3-31-934195-8
|
| Authors |
Brock J. LaMeres, LaMeres, Brock J. |
Mendeley readers
The data shown below were compiled from readership statistics for 3 Mendeley readers of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
| Country | Count | As % |
|---|---|---|
| Unknown | 3 | 100% |
Demographic breakdown
| Readers by professional status | Count | As % |
|---|---|---|
| Other | 1 | 33% |
| Unknown | 2 | 67% |
| Readers by discipline | Count | As % |
|---|---|---|
| Computer Science | 1 | 33% |
| Agricultural and Biological Sciences | 1 | 33% |
| Unknown | 1 | 33% |