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Mendeley readers
| Chapter title |
Timed Verification of Asynchronous Circuits
|
|---|---|
| Chapter number | 8 |
| Book title |
Concurrency and Hardware Design
|
| Published by |
Springer, Berlin, Heidelberg, January 2002
|
| DOI | 10.1007/3-540-36190-1_8 |
| Book ISBNs |
978-3-54-000199-7, 978-3-54-036190-9
|
| Authors |
Jesper Møller, Henrik Hulgaard, Henrik Reif Andersen, Møller, Jesper, Hulgaard, Henrik, Andersen, Henrik, Andersen, Henrik Reif, Reif Andersen, Henrik |
Mendeley readers
The data shown below were compiled from readership statistics for 3 Mendeley readers of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
| Country | Count | As % |
|---|---|---|
| France | 1 | 33% |
| Unknown | 2 | 67% |
Demographic breakdown
| Readers by professional status | Count | As % |
|---|---|---|
| Professor | 1 | 33% |
| Student > Ph. D. Student | 1 | 33% |
| Researcher | 1 | 33% |
| Readers by discipline | Count | As % |
|---|---|---|
| Computer Science | 2 | 67% |
| Unknown | 1 | 33% |