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Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip

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Cover of 'Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip'

Table of Contents

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    Book Overview
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    Chapter 1 Embedded Memories: Introduction
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    Chapter 2 Gain-Cell eDRAMs (GC-eDRAMs): Review of Basics and Prior Art
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    Chapter 3 Retention Time Modeling: The Key to Low-Power GC-eDRAMs
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    Chapter 4 Conventional GC-eDRAMs Scaled to Near-Threshold Voltage (NTV)
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    Chapter 5 Novel Bitcells and Assist Techniques for NTV GC-eDRAMs
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    Chapter 6 Aggressive Technology and Voltage Scaling (Down to the Subthreshold Domain)
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    Chapter 7 Novel Bitcells for Scaled CMOS Nodes and Soft Error Tolerance
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    Chapter 8 Conclusions
Attention for Chapter 3: Retention Time Modeling: The Key to Low-Power GC-eDRAMs
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