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Designing Correct Circuits

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Cover of 'Designing Correct Circuits'

Table of Contents

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    Book Overview
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    Chapter 1 Constrained Proofs: A Logic for Dealing with Behavioural Constraints in Formal Hardware Verification
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    Chapter 2 Hardware synthesis in constructive type theory
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    Chapter 3 An Algebraic Framework for Data Abstraction in Hardware Description
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    Chapter 4 Generic Specification of Digital Hardware
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    Chapter 5 Sampling and Proof: A Half-Case Study
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    Chapter 6 High Level Test Generation via Process Composition
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    Chapter 7 Towards Truly Delay-Insensitive Circuit Realizations of Process Algebras
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    Chapter 8 The Design of a Delay-Insensitive Stack
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    Chapter 9 Specifying the Micro-program Parallelism for Microprocessors of the Von Neumann style
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    Chapter 10 The Implementation and Proof of a Boolean Simplification System
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    Chapter 11 A Model for Synchronous Switching Circuits and its Theory of Correctness
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    Chapter 12 Efficient Circuits as Implementations of Non-Strict Functions
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    Chapter 13 Verification of Synchronous Concurrent Algorithms Using OBJ3: A Case Study of the Pixel-Planes Architecture
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    Chapter 14 Use of the OTTER theorem prover for the formal verification of hardware
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    Chapter 15 Proof-based transformation of formal hardware models
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    Chapter 16 Ruby algebra
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    Chapter 17 Using the Declarative Language LUSTRE for Circuit Verification
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    Chapter 18 Optimising designs by transposition
Attention for Chapter 6: High Level Test Generation via Process Composition
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Chapter title
High Level Test Generation via Process Composition
Chapter number 6
Book title
Designing Correct Circuits
Published by
Springer, London, January 1991
DOI 10.1007/978-1-4471-3544-9_6
Book ISBNs
978-3-54-019659-4, 978-1-4471-3544-9
Authors

Venkatesh Akella, Ganesh Gopalakrishnan, Akella, Venkatesh, Gopalakrishnan, Ganesh