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Mendeley readers
Chapter title |
FPGA and ASIC Implementation of 16-Bit Vedic Multiplier Using Urdhva Triyakbhyam Sutra
|
---|---|
Chapter number | 4 |
Book title |
Emerging Research in Electronics, Computer Science and Technology
|
Published by |
Springer, New Delhi, January 2014
|
DOI | 10.1007/978-81-322-1157-0_4 |
Book ISBNs |
978-8-13-221156-3, 978-8-13-221157-0
|
Authors |
K. B. Jagannatha, H. S. Lakshmisagar, G. R. Bhaskar, Jagannatha, K. B., Lakshmisagar, H. S., Bhaskar, G. R. |
Mendeley readers
The data shown below were compiled from readership statistics for 2 Mendeley readers of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
Country | Count | As % |
---|---|---|
Unknown | 2 | 100% |
Demographic breakdown
Readers by professional status | Count | As % |
---|---|---|
Lecturer > Senior Lecturer | 1 | 50% |
Unknown | 1 | 50% |
Readers by discipline | Count | As % |
---|---|---|
Business, Management and Accounting | 1 | 50% |
Unknown | 1 | 50% |