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CONPAR 90 — VAPP IV

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Table of Contents

  1. Altmetric Badge
    Book Overview
  2. Altmetric Badge
    Chapter 83 Digital electronics for 50 years: No limits to growth?
  3. Altmetric Badge
    Chapter 84 Parallel computing : An Indian perspective
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    Chapter 85 POOMA, POOL and parallel symbolic computing: An assessment
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    Chapter 86 A decoupled data-driven architecture with vectors and macro actors
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    Chapter 87 A novel paradigm of parallel computation and its use to implement simple high performance hardware
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    Chapter 88 Presto: A bus-connected multiprocessor for a rete-based production system
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    Chapter 89 A model for performance prediction of message passing multiprocessors achieving concurrency by domain decomposition
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    Chapter 90 Workloads, observables, benchmarks and instrumentation
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    Chapter 91 A method for performance prediction of parallel programs
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    Chapter 92 Divide and conquer: A new parallel algorithm for the solution of a tridiagonal linear system of equations
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    Chapter 93 Sparse matrix algorithms for SUPRENUM
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    Chapter 94 Parallel givens factorization on a shared memory multiprocessor
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    Chapter 95 Study of a parallel inference machine for parallel execution of logic programs
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    Chapter 96 Parallel implementation of logic languages
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    Chapter 97 Prolog implementations on parallel computers
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    Chapter 98 Performance evaluation of parallel programs in parallel and distributed systems
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    Chapter 99 The ELAN performance analysis environment
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    Chapter 100 Monitoring and debugging Transputer-networks with NETMON-II
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    Chapter 101 An adaptive blocking strategy for matrix factorizations
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    Chapter 102 Factorizations of band matrices using level 3 BLAS
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    Chapter 103 On the computation of breeding values
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    Chapter 104 Code parallelization for the LGDG large-grain dataflow computation
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    Chapter 105 Development of portable parallel programs with large-grain data flow 2
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    Chapter 106 ADAM: a coarse-grain dataflow architecture that addresses the load balancing and throttling problems
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    Chapter 107 A latency tolerant code generation algorithm for a coarse grain dataflow machine
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    Chapter 108 Cedar Fortrand its compiler
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    Chapter 109 Optimizing communication in SUPERB
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    Chapter 110 A design of performance-optimized control-based synchronization
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    Chapter 111 Interprocess analysis and optimization in the equational language compiler
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    Chapter 112 Transputer based distributed cartographic image processing
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    Chapter 113 MPS-an experimental multi-microprocessor based parallel system
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    Chapter 114 Parallel implementation of the convolution method in image reconstruction
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    Chapter 115 SYDAMA II: A heterogeneous multiprocessor system for real time image processing
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    Chapter 116 Analysis and design of circuit switching interconnection networks using 4×4 nodes
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    Chapter 117 Design and simulation of a multistage interconnection network
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    Chapter 118 A reconfigurable interconnection network for flexible pipelining
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    Chapter 119 A fast distributed mapping algorithm
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    Chapter 120 A note on the load balancing problem for coarse grained hypercube dictionary machines
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    Chapter 121 Hierarchical wiring in multigrids
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    Chapter 122 Optimal data structures for an efficient vectorized finite element code
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    Chapter 123 FFTVPLIB, a collection of Fast Fourier transforms for vectorprocessors
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    Chapter 124 Improving the vector performance via algorithmic domain decomposition
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    Chapter 125 Implementation of parallel numerical routines using broadcast communication schemes
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    Chapter 126 A process and memory model for a parallel distributed-memory machine
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    Chapter 127 A deadlock free routing algorithm with network size independent buffering space
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    Chapter 128 From object-oriented programming to automatic load distribution
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    Chapter 129 Partitioning programs into processes
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    Chapter 130 An MIMD execution environment with a fixed number of processes
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    Chapter 131 Sorting large data files on POOMA
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    Chapter 132 Parallelizing divide-and-conquer algorithms — Microtasking versus autotasking
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    Chapter 133 The performance of linear algebra subprograms on the siemens S series
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    Chapter 134 A family of highly parallel computers
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    Chapter 135 A distributed shared memory multiprocessor kit with scalable local complexity
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    Chapter 136 Scalable cache coherence for large shared memory multiprocessors
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    Chapter 137 Design and implementation of an exception handling mechanism for communicating sequential processes
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    Chapter 138 Creating and controlling concurrency in object oriented systems — A case study —
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    Chapter 139 A distributed algorithm for dynamic task scheduling
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    Chapter 140 TéNOR++: A dynamic configurer for SuperNode machines
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    Chapter 141 Parallel modelling of electromagnetic field scattering: A new approach using the Edinburgh concurrent supercomputer facility
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    Chapter 142 3D multigrid correction methods for Transputer networks
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    Chapter 143 A comparative study of two wavefront implementations of a LU solver algorithm
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    Chapter 144 Systolic array architecture for two-dimensional discrete Fourier transform
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    Chapter 145 Design and implementation of M1 Cellprocessor
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    Chapter 146 A comparison of microtasking implementations of the applicative language SISAL
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    Chapter 147 An efficient scheme for fine-grain software pipelining
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    Chapter 148 Sisal on a message passing architecture
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    Chapter 149 The TOPSYS architecture
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    Chapter 150 MMK - A distributed operating system kernel with integrated dynamic loadbalancing
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    Chapter 151 The distributed monitor system of TOPSYS
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    Chapter 152 Hybrid algorithms for the elgensolution of large sparse symmetric matrices on the AMT DAP 510
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    Chapter 153 Virtual systems architecture on the AMT DAP
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    Chapter 154 Numerical simulation of thermal convection on SIMD computers
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    Chapter 155 Massively parallel realization of logical operations in distributed parallel systems
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    Chapter 156 High-performance computer system "Siberia"
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    Chapter 157 EDS hardware architecture
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    Chapter 158 Visualizing and analysing the runtime behavior of parallel programs
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    Chapter 159 PATOP for performance tuning of parallel programs
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    Chapter 160 Real-time visualization of concurrent processes
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    Chapter 161 Achieving superlinear speedups for the multiple polynomial quadratic sieve factoring algorithm on a distributed memory multiprocessor
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    Chapter 162 A performance analysis of network topologies in finding the roots of a polynomial
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    Chapter 163 Parallel multigrid algorithms for some specialized computer systems
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    Chapter 164 Computation race at CONPAR 90, VAPP IV ETH Zurich, Sep 10–13, 1990
Overall attention for this book and its chapters
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Title
CONPAR 90 — VAPP IV
Published by
Springer Berlin Heidelberg, January 2006
DOI 10.1007/3-540-53065-7
ISBNs
978-3-54-053065-7, 978-3-54-046597-3
Editors

Burkhart, Helmar

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Mendeley readers

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Geographical breakdown

Country Count As %
Unknown 1 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 1 100%
Librarian 1 100%
Readers by discipline Count As %
Computer Science 1 100%
Social Sciences 1 100%