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CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies

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Cover of 'CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies'

Table of Contents

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    Book Overview
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    Chapter 1 Introduction and Motivation
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    Chapter 2 SRAM Circuit Design and Operation
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    Chapter 3 SRAM Cell Stability: Definition, Modeling and Testing
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    Chapter 4 Traditional SRAM Fault Models and Test Practices
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    Chapter 5 Techniques for Detection of SRAM Cells with Stability Faults
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    Chapter 6 Soft Errors in SRAMs: Sources, Mechanisms and Mitigation Techniques
Attention for Chapter 6: Soft Errors in SRAMs: Sources, Mechanisms and Mitigation Techniques
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