Using Process Simulation to Assess the Test Design Effort Reduction of a Model-Based Testing Approach
Book chapter (January 2008)
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Hardware and Software, Verification and Testing
Overview of attention for book
Table of Contents
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Altmetric BadgeBook Overview
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Altmetric BadgeChapter 1 Path-Based System Level Stimuli Generation
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Altmetric BadgeChapter 2 The Safety Simple Subset
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Altmetric BadgeChapter 3 A Case for Runtime Validation of Hardware
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Altmetric BadgeChapter 4 Assertion-Based Verification for the SpaceCAKE Multiprocessor – A Case Study
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Altmetric BadgeChapter 5 Simultaneous SAT-Based Model Checking of Safety Properties
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Altmetric BadgeChapter 6 HaifaSat : A New Robust SAT Solver
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Altmetric BadgeChapter 7 Production-Testing of Embedded Systems with Aspects
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Altmetric BadgeChapter 8 Assisting the Code Review Process Using Simple Pattern Recognition
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Altmetric BadgeChapter 9 An Extensible Open-Source Compiler Infrastructure for Testing
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Altmetric BadgeChapter 10 Effective Black-Box Testing with Genetic Algorithms
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Altmetric BadgeChapter 11 Optimal Algorithmic Debugging and Reduced Coverage Using Search in Structured Domains
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Altmetric BadgeChapter 12 Benchmarking and Testing OSD for Correctness and Compliance
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Altmetric BadgeChapter 13 A Kernel-Based Communication Fault Injector for Dependability Testing of Distributed Systems
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Altmetric BadgeChapter 14 Detecting Potential Deadlocks with Static Analysis and Run-Time Monitoring
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Altmetric BadgeChapter 15 Dynamic Deadlock Analysis of Multi-threaded Programs
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Altmetric BadgeChapter 16 Verification of the Java Causality Requirements
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Altmetric BadgeChapter 17 Choosing Among Alternative Futures
Attention for Chapter 11:
Optimal Algorithmic Debugging and Reduced Coverage Using Search in Structured Domains