High-speed CMOS Circuits for Optical Receivers

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Cover of 'High-speed CMOS Circuits for Optical Receivers'

Table of Contents

Attention for Chapter 3: Clock and Data Recovery Architectures

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dimensions_citation: 15 Dimensions

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So far, Dimensions has found 15 publications that cite this research output.

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The most recent citing publications are shown below. View all 15 publications that cite this research output on Dimensions.

A 9-10.8 Gb/s Linear Clock and Data Recovery System with Adaptive Loop Gain

Conference proceeding (May 2018)

A divider-less, high speed and wide locking range phase locked loop

Article in AEU - International Journal of Electronics and Communications (April 2015)

Regulated Common-Gate Transimpedance Amplifier for Radiation Detectors and Receivers

Conference proceeding (June 2014)

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