Field-Programmable Logic and Applications

Table of Contents

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   Book Overview
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   Chapter 205 Multicontext dynamic reconfiguration and real-time probing on a novel mixed signal programmable device with on-chip microprocessor
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   Chapter 206 CAD-oriented FPGA and dedicated CAD system for telecommunications
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   Chapter 207 Rothko: A three dimensional FPGA architecture, its fabrication, and design tools
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   Chapter 208 Extending dynamic circuit switching to meet the challenges of new FPGA architectures
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   Chapter 209 Performance evaluation of a full speed PCI initiator and target subsystem using FPGAs
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   Chapter 210 Implementation of pipelined multipliers on Xilinx FPGAs
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   Chapter 211 The XC620ODS development system
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   Chapter 212 Thermal monitoring on FPGAs using ring-oscillators
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    Chapter 213 A reconfigurable approach to low cost media processing
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    Chapter 214 Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research
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    Chapter 215 Stream synthesis for a wormhole run-time reconfigurable platform
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    Chapter 216 Pipeline morphing and virtual pipelines
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    Chapter 217 Parallel graph colouring using FPGAs
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    Chapter 218 Run-time compaction of FPGA designs
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    Chapter 219 Partial reconfiguration of FPGA mapped designs with applications to fault tolerance and yield enhancement
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    Chapter 220 A case study of partially evaluated hardware circuits: Key-specific DES
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    Chapter 221 Run-time parameterised circuits for the Xilinx XC6200
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    Chapter 222 Automatic identification of swappable logic units in XC6200 circuitry
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    Chapter 223 Towards an expert system for a priori estimation of reconfiguration latency in dynamically reconfigurable logic
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    Chapter 224 Exploiting reconfigurability through domain-specific systems
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    Chapter 225 Technology mapping by binate covering
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    Chapter 226 VPR: a new packing, placement and routing tool for FPGA research
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    Chapter 227 Technology mapping of heterogeneous LUT-based FPGAs
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    Chapter 228 Technology-driven FSM partitioning for synthesis of large sequential circuits targeting lookup-table based FPGAs
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    Chapter 229 Technology mapping of LUT based FPGAs for delay optimisation
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    Chapter 230 Automatic Mapping of Algorithms onto multiple FPGA-SRAM Modules
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    Chapter 231 FPLD HDL synthesis employing high-level evolutionary algorithm optimisation
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    Chapter 232 An hardware/software partitioning algorithm for custom computing machines
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    Chapter 233 The Java Environment for Reconfigurable Computing
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    Chapter 234 Data scheduling to increase performance of parallel accelerators
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    Chapter 235 An operating system for custom computing machines based on the Xputer paradigm
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    Chapter 236 Fast parallel implementation of DFT using configurable devices
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    Chapter 237 Enhancing fixed point DSP processor performance by adding CPLD's as coprocessing elements
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    Chapter 238 A case study of algorithm implementation in reconfigurable hardware and software
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    Chapter 239 A reconfigurable data-localised array for morphological algorithms
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    Chapter 240 Virtual radix array processors (V-RaAP)
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    Chapter 241 An FPGA implementation of a matched filter detector for spread spectrum communications systems
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    Chapter 242 An NTSC and PAL closed caption processor
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    Chapter 243 A 800Mpixel/sec reconfigurable image correlator on XC6216
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    Chapter 244 A reconfigurable coprocessor for a PCI-based real time computer vision system
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    Chapter 245 Real-time stereopsis using FPGAs
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    Chapter 246 FPGAs Implementation of a digital IQ demodulator using VHDL
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    Chapter 247 Hardware compilation, configurable platforms and ASICs for self-validating sensors
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    Chapter 248 PostScript™ rendering with virtual hardware
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    Chapter 249 P4: A platform for FPGA implementation of protocol boosters
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    Chapter 250 Satisfiability on reconfigurable hardware
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    Chapter 251 Auto-configurable array for GCD computation
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    Chapter 252 Structural versus algorithmic approaches for efficient adders on xilinx 5200 FPGA
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    Chapter 253 FPGA implementation of real-time digital controllers using on-line arithmetic
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    Chapter 254 A prototyping environment for fuzzy controllers
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    Chapter 255 A reconfigurable sensor-data processing system for personal robots