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Timeline
Chapter title |
Conclusions
|
---|---|
Chapter number | 9 |
Book title |
Finite State Machine Logic Synthesis for Complex Programmable Logic Devices
|
Published by |
Springer, Berlin, Heidelberg, January 2013
|
DOI | 10.1007/978-3-642-36166-1_9 |
Book ISBNs |
978-3-64-236165-4, 978-3-64-236166-1
|
Authors |
Robert Czerwinski, Dariusz Kania, Czerwinski, Robert, Kania, Dariusz |