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Analog Design Issues in Digital VLSI Circuits and Systems

Overview of attention for book
Cover of 'Analog Design Issues in Digital VLSI Circuits and Systems'

Table of Contents

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    Book Overview
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    Chapter 1 Guest Editorial
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    Chapter 2 Selection of Voltage Thresholds for Delay Measurement
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    Chapter 3 Delay and Power Expressions for a CMOS Inverter Driving a Resistive-Capacitive Load
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    Chapter 4 Mixed Analog Digital Simulation of Integrated Circuits with BRASIL
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    Chapter 5 Ramp Input Response of RC Tree Networks
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    Chapter 6 A Wired-AND Current-Mode Logic Circuit Technique in CMOS for Low-Voltage, High-Speed and Mixed-Signal VLSIC
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    Chapter 7 Design and Evaluation of Adiabatic Arithmetic Units
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    Chapter 8 Filter Design Using a New Field-Programmable Analog Array (FPAA)
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    Chapter 9 CMOS PLL Design in a Digital Chip Environment
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    Chapter 10 di / dt Noise in CMOS Integrated Circuits
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    Chapter 11 Latin Hypercube Sampling Monte Carlo Estimation of Average Quality Index for Integrated Circuits
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    Chapter 12 Analysis of Metastable Operation in a CMOS Dynamic D-Latch
Attention for Chapter 10: di / dt Noise in CMOS Integrated Circuits
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Chapter title
di / dt Noise in CMOS Integrated Circuits
Chapter number 10
Book title
Analog Design Issues in Digital VLSI Circuits and Systems
Published by
Springer, Boston, MA, January 1997
DOI 10.1007/978-1-4615-6101-9_10
Book ISBNs
978-1-4613-7795-5, 978-1-4615-6101-9
Authors

Patrik Larsson

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Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 3 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 3 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 1 33%
Researcher 1 33%
Student > Master 1 33%
Readers by discipline Count As %
Engineering 3 100%

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