Network and Parallel Computing
Springer Berlin Heidelberg
Chapter title |
Designing Coalescing Network-on-Chip for Efficient Memory Accesses of GPGPUs
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Chapter number | 15 |
Book title |
Network and Parallel Computing
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Published by |
Springer, Berlin, Heidelberg, September 2014
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DOI | 10.1007/978-3-662-44917-2_15 |
Book ISBNs |
978-3-66-244916-5, 978-3-66-244917-2
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Authors |
Chien-Ting Chen, Yoshi Shih-Chieh Huang, Yuan-Ying Chang, Chiao-Yun Tu, Chung-Ta King, Tai-Yuan Wang, Janche Sang, Ming-Hua Li, Chen, Chien-Ting, Huang, Yoshi Shih-Chieh, Chang, Yuan-Ying, Tu, Chiao-Yun, King, Chung-Ta, Wang, Tai-Yuan, Sang, Janche, Li, Ming-Hua |
Country | Count | As % |
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Unknown | 2 | 100% |
Readers by professional status | Count | As % |
---|---|---|
Student > Ph. D. Student | 2 | 100% |
Readers by discipline | Count | As % |
---|---|---|
Computer Science | 1 | 50% |
Engineering | 1 | 50% |