Cryptographic Hardware and Embedded Systems - CHES 2006

Table of Contents

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   Book Overview
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   Chapter 1 Template Attacks in Principal Subspaces
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   Chapter 2 Templates vs. Stochastic Methods
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   Chapter 3 Towards Security Limits in Side-Channel Attacks
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   Chapter 4 HIGHT: A New Block Cipher Suitable for Low-Resource Device
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   Chapter 5 Integer Factoring Utilizing PC Cluster
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   Chapter 6 Optically Enhanced Position-Locked Power Analysis
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   Chapter 7 Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations
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   Chapter 8 A Generalized Method of Differential Fault Attack Against AES Cryptosystem
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    Chapter 9 Breaking Ciphers with COPACOBANA –A Cost-Optimized Parallel Code Breaker
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    Chapter 10 Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware
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    Chapter 11 Implementing Cryptographic Pairings on Smartcards
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    Chapter 12 SPA-Resistant Scalar Multiplication on Hyperelliptic Curve Cryptosystems Combining Divisor Decomposition Technique and Joint Regular Form
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    Chapter 13 Cryptographic Hardware and Embedded Systems - CHES 2006
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    Chapter 14 A Proposition for Correlation Power Analysis Enhancement
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    Chapter 15 High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching
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    Chapter 16 Cache-Collision Timing Attacks Against AES
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    Chapter 17 Provably Secure S-Box Implementation Based on Fourier Transform
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    Chapter 18 The Outer Limits of RFID Security
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    Chapter 19 Three-Phase Dual-Rail Pre-charge Logic
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    Chapter 20 Dual-Rail Random Switching Logic: A Countermeasure to Reduce Side Channel Leakage
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    Chapter 21 Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style
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    Chapter 22 Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors
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    Chapter 23 NanoCMOS-Molecular Realization of Rijndael
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    Chapter 24 Improving SHA-2 Hardware Implementations
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    Chapter 25 Offline Hardware/Software Authentication for Reconfigurable Platforms
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    Chapter 26 Why One Should Also Secure RSA Public Key Elements
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    Chapter 27 Power Attack on Small RSA Public Exponent
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    Chapter 28 Unified Point Addition Formulæ and Side-Channel Attacks
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    Chapter 29 Read-Proof Hardware from Protective Coatings
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    Chapter 30 Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits
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    Chapter 31 Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks
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    Chapter 32 Challenges for Trusted Computing
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    Chapter 33 Superscalar Coprocessor for High-Speed Curve-Based Cryptography
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    Chapter 34 Hardware/Software Co-design of Elliptic Curve Cryptography on an 8051 Microcontroller
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    Chapter 35 FPGA Implementation of Point Multiplication on Koblitz Curves Using Kleinian Integers