Proceedings of the International Conference on Data Engineering and Communication Technology
Springer, Singapore
Chapter title |
FPGA Implementation of Low Power Pipelined 32-Bit RISC Processor Using Clock Gating
|
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Chapter number | 74 |
Book title |
Proceedings of the International Conference on Data Engineering and Communication Technology
|
Published by |
Springer, Singapore, January 2017
|
DOI | 10.1007/978-981-10-1678-3_74 |
Book ISBNs |
978-9-81-101677-6, 978-9-81-101678-3
|
Authors |
R. Shashidar, R. Santhosh Kumar, A. M. MahalingaSwamy, M. Roopa |
Country | Count | As % |
---|---|---|
Unknown | 4 | 100% |
Readers by professional status | Count | As % |
---|---|---|
Student > Ph. D. Student | 1 | 25% |
Student > Doctoral Student | 1 | 25% |
Unknown | 2 | 50% |
Readers by discipline | Count | As % |
---|---|---|
Medicine and Dentistry | 1 | 25% |
Engineering | 1 | 25% |
Unknown | 2 | 50% |