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Mendeley readers
Chapter title |
The Implementation of a FPGA Hardware Debugger System with Minimal System Overhead
|
---|---|
Chapter number | 127 |
Book title |
Field Programmable Logic and Application
|
Published by |
Springer, Berlin, Heidelberg, August 2004
|
DOI | 10.1007/978-3-540-30117-2_127 |
Book ISBNs |
978-3-54-022989-6, 978-3-54-030117-2
|
Authors |
J. Tombs, M. A. Aguirre Echanóve, F. Muñoz, V. Baena, A. Torralba, A. Fernandez-León, F. Tortosa, Tombs, J., Aguirre Echanóve, M. A., Muñoz, F., Baena, V., Torralba, A., Fernandez-León, A., Tortosa, F. |
Mendeley readers
The data shown below were compiled from readership statistics for 5 Mendeley readers of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
Country | Count | As % |
---|---|---|
Germany | 1 | 20% |
Brazil | 1 | 20% |
Unknown | 3 | 60% |
Demographic breakdown
Readers by professional status | Count | As % |
---|---|---|
Student > Master | 2 | 40% |
Professor | 1 | 20% |
Student > Bachelor | 1 | 20% |
Student > Ph. D. Student | 1 | 20% |
Researcher | 1 | 20% |
Other | 0 | 0% |
Readers by discipline | Count | As % |
---|---|---|
Engineering | 4 | 80% |
Computer Science | 1 | 20% |
Business, Management and Accounting | 1 | 20% |