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On and Off-Chip Crosstalk Avoidance in VLSI Design

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Cover of 'On and Off-Chip Crosstalk Avoidance in VLSI Design'

Table of Contents

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    Book Overview
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    Chapter 1 Introduction of On-Chip Crosstalk Avoidance
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    Chapter 2 Preliminaries to On-chip Crosstalk
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    Chapter 3 Memoryless Crosstalk Avoidance Codes
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    Chapter 4 CODEC Designs for Memoryless Crosstalk Avoidance Codes
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    Chapter 5 Memory-based Crosstalk Avoidance Codes
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    Chapter 6 Multi-valued Logic Crosstalk Avoidance Codes
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    Chapter 7 Summary of On-Chip Crosstalk Avoidance
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    Chapter 8 Introduction to Off-Chip Crosstalk
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    Chapter 9 Package Construction and Electrical Modeling
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    Chapter 10 Preliminaries and Terminology
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    Chapter 11 Analytical Model for Off-Chip Bus Performance
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    Chapter 12 Optimal Bus Sizing
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    Chapter 13 Bus Expansion Encoder
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    Chapter 14 Bus Stuttering Encoder
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    Chapter 15 Impedance Compensation
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    Chapter 16 Future Trends and Applications
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    Chapter 17 Summary of Off-Chip Crosstalk Avoidance
Attention for Chapter 13: Bus Expansion Encoder
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