You are seeing a free-to-access but limited selection of the activity Altmetric has collected about this research output.
Click here to find out more.
Mendeley readers
Chapter title |
Interconnect Power Analysis for a Coarse-Grained Reconfigurable Array Processor
|
---|---|
Chapter number | 45 |
Book title |
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
|
Published by |
Springer, Berlin, Heidelberg, September 2008
|
DOI | 10.1007/978-3-540-95948-9_45 |
Book ISBNs |
978-3-54-095947-2, 978-3-54-095948-9
|
Authors |
Mladen Berekovic, Frank Bouwens, Tom Vander Aa, Diederik Verkest |
Mendeley readers
The data shown below were compiled from readership statistics for 5 Mendeley readers of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
Country | Count | As % |
---|---|---|
China | 1 | 20% |
Germany | 1 | 20% |
Singapore | 1 | 20% |
Unknown | 2 | 40% |
Demographic breakdown
Readers by professional status | Count | As % |
---|---|---|
Student > Ph. D. Student | 3 | 60% |
Researcher | 2 | 40% |
Readers by discipline | Count | As % |
---|---|---|
Engineering | 4 | 80% |
Computer Science | 1 | 20% |