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Field-Programmable Logic and Applications

Overview of attention for book
Cover of 'Field-Programmable Logic and Applications'

Table of Contents

  1. Altmetric Badge
    Book Overview
  2. Altmetric Badge
    Chapter 1 Technology Trends and Adaptive Computing
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    Chapter 2 Prototyping Framework for Reconfigurable Processors
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    Chapter 3 An Emulator for Exploring RaPiD Configurable Computing Architectures
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    Chapter 4 A New Placement Method for Direct Mapping into LUT-Based FPGAs
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    Chapter 5 fGREP - Fast Generic Routing Demand Estimation for Placed FPGA Circuits
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    Chapter 6 Macrocell Architectures for Product Term Embedded Memory Arrays
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    Chapter 7 Gigahertz Reconfigurable Computing Using SiGe HBT BiCMOS FPGAs
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    Chapter 8 Memory Synthesis for FPGA-Based Reconfigurable Computers
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    Chapter 9 Implementing a Hidden Markov Model Speech Recognition System in Programmable Logic
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    Chapter 10 Implementation of (Normalised) RLS Lattice on Virtex
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    Chapter 11 Accelerating Matrix Product on Reconfigurable Hardware for Signal Processing
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    Chapter 12 Static Profile-Driven Compilation for FPGAs
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    Chapter 13 Synthesizing RTL Hardware from Java Byte Codes
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    Chapter 14 PuMA ++: From Behavioral Specification to Multi-FPGA-Prototype
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    Chapter 15 Secure Configuration of Field Programmable Gate Arrays
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    Chapter 16 Single-Chip FPGA Implementation of the Advanced Encryption Standard Algorithm
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    Chapter 17 JBits™ Implementations of the Advanced Encryption Standard (Rijndael)
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    Chapter 18 Task-Parallel Programming of Reconfigurable Systems
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    Chapter 19 Chip-Based Reconfigurable Task Management
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    Chapter 20 Configuration Caching and Swapping
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    Chapter 21 Multiple Stereo Matching Using an Extended Architecture
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    Chapter 22 Implementation of a NURBS to Bézier Conversor with Constant Latency
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    Chapter 23 Reconfigurable Frame-Grabber for Real-Time Automated Visual Inspection (RT-AVI) Systems
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    Chapter 24 Processing Models for the Next Generation Network
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    Chapter 25 Tightly Integrated Placement and Routing for FPGAs
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    Chapter 26 Gambit: A Tool for the Simultaneous Placement and Detailed Routing of Gate-Arrays
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    Chapter 27 Reconfigurable Router Modules Using Network Protocol Wrappers
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    Chapter 28 Development of a Design Framework for Platform-Independent Networked Reconfiguration of Software and Hardware
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    Chapter 29 The MOLEN ρμ-Coded Processor
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    Chapter 30 Run-Time Optimized Reconfiguration Using Instruction Forecasting
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    Chapter 31 CRISP: A Template for Reconfigurable Instruction Set Processors
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    Chapter 32 Evaluation of an FPGA Implementation of the Discrete Element Method
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    Chapter 33 Run-Time Performance Optimization of an FPGA-Based Deduction Engine for SAT Solvers
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    Chapter 34 A Reconfigurable Embedded Input Device for Kinetically Challenged Persons
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    Chapter 35 Bubble Partitioning for LUT-Based Sequential Circuits
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    Chapter 36 Rapid Construction of Partial Configuration Datastreams from High-Level Constructs Using JBits
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    Chapter 37 Placing, Routing, and Editing Virtual FPGAs
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    Chapter 38 Virtex Implementation of Pipelined Adaptive LMS Predictor in Electronic Support Measures Receiver
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    Chapter 39 A Music Synthesizer on FPGA
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    Chapter 40 Motivation from a Full-Rate Specific Design to a DSP Core Approach for GSM Vocoders
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    Chapter 41 Loop Tiling for Reconfigurable Accelerators
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    Chapter 42 The Systolic Ring: A Dynamically Reconfigurable Architecture for Embedded Systems
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    Chapter 43 Field-Programmable Logic and Applications
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    Chapter 44 Real Time Morphological Image Contrast Enhancement in Virtex FPGA
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    Chapter 45 Demonstrating Real-time JPEG Image Compression-Decompression using Standard Component IP Cores on a Programmable Logic based Platform for DSP and Image Processing
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    Chapter 46 Design and Implementation of an Accelerated Gabor Filter Bank Using Parallel Hardware
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    Chapter 47 The Evolution of Programmable Logic: Past, Present, and Future Predictions
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    Chapter 48 Dynamically Reconfigurable Cores
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    Chapter 49 Reconfigurable Breakpoints for Co-debug
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    Chapter 50 Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification
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    Chapter 51 FPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits
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    Chapter 52 A Generic Library for Adaptive Computing Environments
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    Chapter 53 Generative Development System for FPGA essors with Active Components
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    Chapter 54 Compilation Increasing the Scheduling Scope for Multi-memory-FPGA-Based Custom Computing Machines
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    Chapter 55 System Level Tools for DSP in FPGAs
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    Chapter 56 Parameterized Function Evaluation for FPGAs
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    Chapter 57 Efficient Constant Coefficient Multiplication Using Advanced FPGA Architectures
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    Chapter 58 A Digit-Serial Structure for Reconfigurable Multipliers
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    Chapter 59 FPGA Resource Reduction Through Truncated Multiplication
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    Chapter 60 Efficient Mapping of Pre-synthesized IP-Cores onto Dynamically Reconfigurable Array Architectures
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    Chapter 61 An FPGA-Based Syntactic Parser for Real-Life Almost Unrestricted Context-Free Grammars
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    Chapter 62 Hardware-Software Partitioning: A Reconfigurable and Evolutionary Computing Approach
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    Chapter 63 An Approach to Real-Time Visualization of PIV Method with FPGA
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    Chapter 64 FPGA-Based Discrete Wavelet Transforms System
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    Chapter 65 X-MatchPRO: A ProASIC-Based 200 Mbytes/s Full-Duplex Lossless Data Compressor
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    Chapter 66 Arithmetic Operation Oriented Reconfigurable Chip: RHW
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    Chapter 67 Initial Analysis of the Proteus Architecture
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    Chapter 68 Building Asynchronous Circuits with JBits
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    Chapter 69 Case Study of Integration of Reconfigurable Logic as a Coprocessor into a SCI-Cluster under RT-Linux
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    Chapter 70 A Reconfigurable Approach to Packet Filtering
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    Chapter 71 FPGA-Based Modelling Unit for High Speed Lossless Arithmetic Coding
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    Chapter 72 A Data Re-use Based Compiler Optimization for FPGAs
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    Chapter 73 Dijkstra’s Shortest Path Routing Algorithm in Reconfigurable Hardware
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    Chapter 74 A System on Chip for Power Line Communications According to European Home Systems Specifications
Overall attention for this book and its chapters
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Citations

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Title
Field-Programmable Logic and Applications
Published by
Springer Science & Business Media, August 2001
DOI 10.1007/3-540-44687-7
ISBNs
978-3-54-042499-4, 978-3-54-044687-3
Editors

Brebner, Gordon, Woods, Roger

View on publisher site Google Preview
Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 6 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
France 1 17%
Unknown 5 83%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 5 83%
Unknown 1 17%
Readers by discipline Count As %
Engineering 3 50%
Computer Science 2 33%
Unknown 1 17%

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