A Study of Logic Synthesis Strategy Based on LVT Devices for Increasing Clock Frequency of SoC Processor Core
Conference proceeding (October 2020)
The most recent citing publications are shown below. View all 3 publications that cite this research output on Dimensions.
VLSI-SoC: An Enduring Tradition
Book chapter (May 2019)
Dual-Data Rate Transpose-Memory Architecture Improves the Performance, Power and Area of Signal-Processing Systems
Article in Journal of Signal Processing Systems (November 2016)