Reconfigurable Computing: Architectures, Tools and Applications : 7th International Symposium, ARC 2011, Belfast, UK, March 23-25, 2011. Proceedings

Table of Contents

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   Book Overview
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   Chapter 1 Reconfigurable Computing for High Performance Networking Applications
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   Chapter 2 Biologically-Inspired Massively-Parallel Architectures: A Reconfigurable Neural Modelling Platform
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   Chapter 3 A Reconfigurable Audio Beamforming Multi-Core Processor
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   Chapter 4 A Regular Expression Matching Circuit Based on a Decomposed Automaton
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   Chapter 5 Design and Implementation of a Multi-Core Crypto-Processor for Software Defined Radios
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   Chapter 6 Application Specific Memory Access, Reuse and Reordering for SDRAM
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   Chapter 7 Automatic Generation of FPGA-Specific Pipelined Accelerators
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   Chapter 8 HLS Tools for FPGA: Faster Development with Better Performance
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    Chapter 9 A (Fault-Tolerant) 2 Scheduler for Real-Time HW Tasks
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    Chapter 10 A Compact Gaussian Random Number Generator for Small Word Lengths
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    Chapter 11 Accurate Floating Point Arithmetic through Hardware Error-Free Transformations
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    Chapter 12 Active Storage Networks for Accelerating K-Means Data Clustering
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    Chapter 13 An FPGA Implementation for Texture Analysis Considering the Real-Time Requirements of Vision-Based Systems
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    Chapter 14 CReAMS: An Embedded Multiprocessor Platform
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    Chapter 15 Dataflow Graph Partitioning for Optimal Spatio-Temporal Computation on a Coarse Grain Reconfigurable Architecture
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    Chapter 16 A Pipeline Interleaved Heterogeneous SIMD Soft Processor Array Architecture for MIMO-OFDM Detection
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    Chapter 17 Design, Implementation, and Verification of an Adaptable Processor in Lava HDL
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    Chapter 18 Towards an Adaptable Multiple-ISA Reconfigurable Processor
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    Chapter 19 FPGA-Based Cherenkov Ring Recognition in Nuclear and Particle Physics Experiments
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    Chapter 20 FPGA-Based Smith-Waterman Algorithm: Analysis and Novel Design
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    Chapter 21 Index to Constant Weight Codeword Converter
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    Chapter 22 On-Chip Ego-Motion Estimation Based on Optical Flow
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    Chapter 23 Comparison between Heterogeneous Mesh-Based and Tree-Based Application Specific FPGA
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    Chapter 24 Dynamic V DD Switching Technique and Mapping Optimization in Dynamically Reconfigurable Processor for Efficient Energy Reduction
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    Chapter 25 MEMS Interleaving Read Operation of a Holographic Memory for Optically Reconfigurable Gate Arrays
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    Chapter 26 FaRM: Fast Reconfiguration Manager for Reducing Reconfiguration Time Overhead on FPGA
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    Chapter 27 Feasibility Analysis of Reconfigurable Computing in Low-Power Wireless Sensor Applications
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    Chapter 28 Hierarchical Optical Flow Estimation Architecture Using Color Cues
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    Chapter 29 Magnetic Look-Up Table (MLUT) Featuring Radiation Hardness, High Performance and Low Power
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    Chapter 30 Reconfigurable Stream-Processing Architecture for Sparse Linear Solvers
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    Chapter 31 The Krawczyk Algorithm: Rigorous Bounds for Linear Equation Solution on an FPGA
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    Chapter 32 A Dynamic Reconfigurable CPLD Architecture for Structured ASIC Technology
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    Chapter 33 FPGA Accelerated Parallel Sparse Matrix Factorization for Circuit Simulations
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    Chapter 34 FPGA Optimizations for a Pipelined Floating-Point Exponential Unit
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    Chapter 35 NetStage/DPR: A Self-adaptable FPGA Platform for Application-Level Network Security
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    Chapter 36 A Correlation Power Analysis Attack against Tate Pairing on FPGA
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    Chapter 37 From Plasma to BeeFarm: Design Experience of an FPGA-Based Multicore Prototype
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    Chapter 38 Architectural Support for Multithreading on Reconfigurable Hardware
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    Chapter 39 Reconfigurable Computing: Architectures, Tools and Applications
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    Chapter 40 Secure Virtualization within a Multi-processor Soft-Core System-on-Chip Architecture