VLSI Physical Design: From Graph Partitioning to Timing Closure

Place and route

Place and route (also called PnR or P

Standard cell

In semiconductor design, standard-cell methodology is a method of designing application-specific integrated circuits (ASICs) with mostly digital-logic features.

Physical verification

Physical verification is a process whereby an integrated circuit layout (IC layout) design is verified via EDA software tools to ensure correct electrical and logical…

Physical design (electronics)

In integrated circuit design, physical design is a step in the standard design cycle which follows after the circuit design.