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Timeline
Chapter title |
Design and Physical Implementation of Mixed Signal Elapsed Time Counter in 0.18 µm CMOS Technology
|
---|---|
Chapter number | 11 |
Book title |
VLSI Design and Test
|
Published by |
Springer, Singapore, July 2019
|
DOI | 10.1007/978-981-32-9767-8_11 |
Book ISBNs |
978-9-81-329766-1, 978-9-81-329767-8
|
Authors |
Saroja V. Siddamal, Suhas B. Shirol, Shraddha Hiremath, Nalini C. Iyer, Siddamal, Saroja V., Shirol, Suhas B., Hiremath, Shraddha, Iyer, Nalini C. |