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Automatic Verification Methods for Finite State Systems

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Cover of 'Automatic Verification Methods for Finite State Systems'

Table of Contents

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    Book Overview
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    Chapter 1 Process calculi, from theory to practice: Verification tools
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    Chapter 2 Testing equivalence as a bisimulation equivalence
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    Chapter 3 The concurrency workbench
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    Chapter 4 Argonaute: Graphical description, semantics and verification of reactive systems by using a process algebra
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    Chapter 5 Using the axiomatic presentation of behavioural equivalences for manipulating CCS specifications
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    Chapter 6 Verifying properties of large sets of processes with network invariants
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    Chapter 7 A method for verification of trace and test equivalence
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    Chapter 8 Projections of the reachability graph and environment models
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    Chapter 9 Proving properties of elementary net systems with a special-purpose theorem prover
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    Chapter 10 Verification by abstraction and bisimulation
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    Chapter 11 MEC : a system for constructing and analysing transition systems
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    Chapter 12 Automatic Verification Methods for Finite State Systems
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    Chapter 13 Network grammars, communication behaviors and automatic verification
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    Chapter 14 CCS, liveness, and local model checking in the linear time mu-calculus
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    Chapter 15 Implementing a model checking algorithm by adapting existing automated tools
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    Chapter 16 On-line model-checking for finite linear temporal logic specifications
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    Chapter 17 Timing assumptions and verification of finite-state concurrent systems
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    Chapter 18 Specifying, programming and verifying real-time systems using a synchronous declarative language
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    Chapter 19 Modal specifications
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    Chapter 20 Automated verification of timed transition models
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    Chapter 21 Temporal logic case study
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    Chapter 22 The complexity of collapsing reachability graphs
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    Chapter 23 What are the limits of model checking methods for the verification of real life protocols?
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    Chapter 24 Requirement analysis for communication protocols
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    Chapter 25 State exploration by transformation with lola
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    Chapter 26 Parallel protocol verification: The two-phase algorithm and complexity analysis
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    Chapter 27 Formal verification of synchronous circuits based on string-functional semantics: The 7 paillet circuits in boyer-moore
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    Chapter 28 Combining CTL, trace theory and timing models
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    Chapter 29 Localized verification of circuit descriptions
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    Chapter 30 Verification of synchronous sequential machines based on symbolic execution
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    Chapter 31 Parallel composition of lockstep synchronous processes for hardware validation: Divide-and-conquer composition
Attention for Chapter 17: Timing assumptions and verification of finite-state concurrent systems
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Chapter title
Timing assumptions and verification of finite-state concurrent systems
Chapter number 17
Book title
Automatic Verification Methods for Finite State Systems
Published by
Springer, Berlin, Heidelberg, June 1989
DOI 10.1007/3-540-52148-8_17
Book ISBNs
978-3-54-052148-8, 978-3-54-046905-6
Authors

David L. Dill, Dill, David L.

Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 58 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Canada 2 3%
Germany 1 2%
Norway 1 2%
Czechia 1 2%
United Kingdom 1 2%
France 1 2%
Argentina 1 2%
Denmark 1 2%
Spain 1 2%
Other 1 2%
Unknown 47 81%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 22 38%
Professor > Associate Professor 8 14%
Researcher 7 12%
Student > Master 7 12%
Other 3 5%
Other 9 16%
Unknown 2 3%
Readers by discipline Count As %
Computer Science 43 74%
Engineering 8 14%
Agricultural and Biological Sciences 1 2%
Mathematics 1 2%
Decision Sciences 1 2%
Other 1 2%
Unknown 3 5%